Model predictive control can deliver excellent converter performance, but building each controller still demands extensive modeling, derivation, optimization, coding, and hardware verification. This research develops an end-to-end digital-twin workflow that automates that path from circuit description to an FPGA-ready controller.
From a netlist to control hardware
The framework begins with the converter topology, parameters, modulation scheme, and performance objectives. A high-fidelity digital twin is generated programmatically from the circuit netlist and used to create training and verification data. Two components then make real-time MPC practical:
- A physics-neural hybrid predictor combines a lightweight physical update with a learned residual correction.
- A gradient-free simplex search optimizer explores the modulation variables without requiring a hand-derived gradient model.
- Quantization-aware training and high-level synthesis convert the predictor into an FPGA IP core.
- The predictor, optimizer, state monitoring, and plant interface are integrated into a cloud-to-edge workflow.
A predictor built for real time
The physics-neural hybrid predictor evaluates only eight points per control cycle. On FPGA it completes a prediction in 1.12 μs, more than seven times faster than the 100 kHz converter’s real-time requirement. Across the triple-phase-shift control space, the mean relative errors are 0.05% for output voltage and 0.18% for inductor current.
The framework was validated on a 1500 W dual-active-bridge converter operating at 100 kHz over a 16–32 V output range. Under both load and voltage-reference changes, the synthesized DT-MPC reached steady state in eight or nine switching cycles. It also maintained zero-voltage switching across all eight devices and remained robust under ±20% parameter mismatch.
Compressing the engineering workflow
Conventional MPC development was estimated at a median of 46 hours, distributed across mode analysis, current derivation, discretization, soft-switching and stress analysis, objective construction, debugging, and validation.
The digital-twin workflow completes the same path in 127 minutes (about 2.1 hours), of which only 50 minutes require direct human work. Netlist-driven model construction, automated data generation, predictor training, and FPGA deployment together reduce total engineering time by 95.4%.
How the synthesized controller is evaluated
Automation is useful only if it preserves engineering constraints. The workflow therefore evaluates the predictor across the full modulation space before deployment, checks quantized FPGA inference against the floating-point reference, and validates the closed loop under large load and voltage steps. Soft switching, current stress, output regulation, and efficiency remain visible objectives rather than hidden consequences of training.
The cloud and edge tasks are deliberately separated. Computationally intensive data generation and training run offline, while the deployed controller contains only the compact predictor and optimizer needed every switching cycle. When converter parameters or objectives change, the offline pipeline can regenerate the controller without redesigning each analytical stage by hand.
Why it matters
The key result is repeatability as much as speed. By converting converter topology and design goals into a structured software-to-hardware pipeline, advanced MPC becomes easier to reproduce, update, and transfer to new systems.
Published in IEEE Transactions on Power Electronics in 2026 (early access, pp. 1–17).